my work sample

              EFM32JG1 and STM8L05 Controller

Introduction:

EFM32 Controller:

EFM32JG1 features a powerful 32-bit ARM® Cortex®-M3 and a wide selection of peripherals, including a unique cryptographic hardware engine supporting AES, ECC, and SHA. These features, combined with ultra-low current active mode and short wake-up time from energy-saving modes, make EFM32JG1 microcontrollers well suited for any battery-powered application, as well as other systems requiring high performance and low-energy consumption. The EFM32JG1 product family is well suited for any battery operated application as well as other systems requiring high performance and low energy consumption.

STM8L Controller:

The value line STM8L05xxx ultra-low-power family features the enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. The family includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive In-application debugging and ultra-fast Flash programming.

Features:

EFM32JG Controller:

• ARM Cortex-M3 CPU platform

• Flexible Energy Management System

• Up to 256 kB flash program memory

• 32 kB RAM data memory

• Up to 32 General Purpose I/O Pins

• Timers/Counters

• Hardware Cryptography

• 8 Channel DMA Controller

• 12 Channel Peripheral Reflex System (PRS) for autonomous inter-peripheral signaling

• Communication Interfaces

       • 2× Universal Synchronous/Asynchronous Receiver/ Transmitter

       • UART/SPI/SmartCard (ISO 7816)/IrDA/I2S/LIN

       • Triple buffered full/half-duplex operation with flow control

       • Low Energy UART

       • Autonomous operation with DMA in Deep Sleep Mode

       • I2C Interface with SMBus support

• Ultra Low-Power Precision Analog Peripherals

• Ultra efficient Power-on Reset and Brown-Out Detector

STM8L Controller:

·      Architecture optimized to reach ultra-low consumption both in low power modes and Run mode

·      Fast startup strategy from low power modes

·      Flexible system clock

·      Ultra-safe reset: same reset strategy for both STM8L and STM32L including power-on reset, power-down reset, brownout reset and programmable voltage detector

·      Low-power modes

·      Advanced STM8 core

·      Interrupt controller

      Up to 40 external interrupt sources on 11 vector

·      Clock management

·      Low-power real-time clock

·      LCD (Liquid crystal display)

·      2 Kbytes of RAM

·      32 Kbytes of medium-density embedded Flash program memory

·       256 bytes of data EEPROM

·      4-channel direct memory access controller

·      Analog-to-digital converter

·      Timers

·      Beeper

·      Communication interfaces

1.      SPI

2.      I2C bus interface

3.      USART interface

4.      Infrared (IR) interface

 Performance of both controllers:

EFM32JG Controller:

·      It has flexible energy management system which supports EM0,EM1,EM2,EM3 modes.

·      This EMU turns off the  power to unused ram blocks and contains the control registers for dc-dc regulator and the voltage monitor(VMON).

·      External volatages are required to generate internal voltages and it reduces the power consumption.

·      For the efficient usage of  power, dc-dc buck regulator is used,which helps in short circuit protection,current limiting and in energy modes.

·      Individual enabling and disabling of clocks to all peripheral modules is performed by the CMU. The CMU also controls enabling and configuration of the oscillators. A high degree of flexibility allows software to optimize energy consumption in any specific application by minimizing power dissipation in unused peripherals and oscillators.

·      A 32.768 kHz crystal oscillator (LFXO) provides an accurate timing reference for low energy modes

·      An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crystal accuracy is not required.

·       An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy consumption in low energy modes.

·      Real time counter and calendar provides time and calendar(in bcd format) in all energy modes. And it is 32 bit counter.

·      TIMER is a 16-bit counter with up to 4 compare/capture channels. And one  of the channels supports pwm mode also.

·      The unique LETIMER is a 16-bit timer that is available in energy mode EM2 Deep Sleep in addition to EM1 Sleep and EM0 Active. This allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of waveforms with minimal software intervention.

·      The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock.

·      The unique LEUARTTM provides two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud. The LEUART includes all necessary hardware to make asynchronous serial communication possible with a minimum of software intervention and energy consumption

·      The PRS(peripheral reflex system) allows peripheral to act autonomously without waking the MCU core, saving power.

·      The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to 1 Msps.

·      Reset Management Unit (RMU)   is responsible for handling reset of the EFM32JG1. A wide range of reset sources are available, including several power supply monitors, pin reset, software controlled reset, core lockup reset, and watchdog reset.

·      This controller works between 1.8v to 3.8v(max) only.

STM8L Controller:

·         All families incorporate highly energy-efficient cores with both Harvard architecture and pipelined execution: advanced STM8 core for STM8L families and ARM® Cortex®-M3 core for STM32L family. In addition specific care for the design architecture has been taken to optimize the mA/DMIPS and mA/MHz ratios. This allows the ultra-low-power performance.

·         STM8L05x, STM8L15x and STM32L15xx share identical peripherals which ensure a very easy migration from one family to another:

1.      Analog peripheral: ADC1

2.      Digital peripherals: RTC and some communication interfaces

·         To offer flexibility and optimize performance, the STM8L and STM32L devices use a common architecture:

1.       Same power supply range from 1.8 to 3.6 V

2.      Architecture optimized to reach ultra-low consumption both in low power modes and Run mode

3.      Fast startup strategy from low power modes

4.      Flexible system clock

5.      Ultra-safe reset: same reset strategy for both STM8L and STM32L including power-on reset, power-down reset, brownout reset and programmable voltage detector

·         Low-power modes:

1.      Wait mode: The CPU clock is stopped, but selected peripherals keep running. An internal or external interrupt, event or a Reset can be used to exit the microcontroller from Wait mode (WFE or WFI mode).

2.      Low power run mode: The CPU and the selected peripherals are running. Execution is done from RAM with a low speed oscillator (LSI or LSE). Flash memory and data EEPROM are stopped and the voltage regulator is configured in ultra-low-power mode. The microcontroller enters Low power run mode by software and can exit from this mode by software or by a reset.  All interrupts must be masked. They cannot be used to exit the microcontroller from this mode.

3.      Low power wait mode: This mode is entered when executing a Wait for event in Low power run mode. It is similar to Low power run mode except that the CPU clock is stopped. The wakeup from this mode is triggered by a Reset or by an internal or external event (peripheral event generated by the timers, serial interfaces, DMA controller (DMA1) and I/O ports). When the wakeup is triggered by an event, the system goes back to Low power run mode.  All interrupts must be masked. They cannot be used to exit the microcontroller from this mode.

4.      Active-halt mode: CPU and peripheral clocks are stopped, except RTC. The wakeup can be triggered by RTC interrupts, external interrupts or reset.

5.      Halt mode: CPU and peripheral clocks are stopped, the device remains powered on. The RAM content is preserved. The wakeup is triggered by an external interrupt or reset. A few peripherals have also a wakeup from Halt capability. Switching off the internal reference voltage reduces power consumption. Through software configuration it is also possible to wake up the device without waiting for the internal reference voltage wakeup time to have a fast wakeup time of 5 µs.

Clock management

The clock controller distributes the system clock (SYSCLK) coming from different oscillators to the core and the peripherals. It also manages clock gating for low power modes and ensures clock robustness.

Features:

1.       Clock prescaler: To get the best compromise between speed and current consumption   the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.

2.      Safe clock switching: Clock sources can be changed safely on the fly in run mode through a configuration register.

3.      Clock management: To reduce power consumption, the clock controller can stop the clock to the core, individual peripherals or memory.

4.      System clock sources: 4 different clock sources can be used to drive the system clock: – 1-16 MHz High speed external crystal (HSE) – 16 MHz High speed internal RC oscillator (HSI) – 32.768 kHz Low speed external crystal (LSE) – 38 kHz Low speed internal RC (LSI)

5.      RTC and LCD clock sources: The above four sources can be chosen to clock the RTC and the LCD, whatever the system clock.

6.      Startup clock: After reset, the microcontroller restarts by default with an internal  2 MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts.

7.      Clock security system (CSS): This feature can be enabled by software. If a HSE clock failure occurs, the system clock is automatically switched to HSI.

8.      Configurable main clock output (CCO): This outputs an external clock for use by the application.

·         it has the lcd  driving digital pins.

·         Window watchdog timer

·         The window watchdog (WWDG) is used to detect the occurrence of a software fault, usually generated by external interferences or by unexpected logical conditions, which cause the application program to abandon its normal sequence.

·         The independent watchdog peripheral (IWDG) can be used to resolve processor malfunctions due to hardware or software failures.

Under strict battery conditions:

EFM32JG Controller:

·         EMU manages the energy modes namely EM0,EM1,EM2,EM3 which are the key source to operate in strict battery conditions.

·         EMU helps in turning off the power unused ram blocks and VMON is used to monitor the power supplies.

·         Dc-dc buck regulator helps in this condition for reducing the current consumption and also gives the short circuit protection.

·         Ultra efficient Power-on Reset and Brown-Out Detector which helps in short dip for the power supply.

·         1× 32-bit Ultra Low Energy CRYOTIMER is helpful  for periodic wakeup from any Energy Mode.

·         16-bit Low Energy Timer for waveform generation present in EM2 Deep sleep mode.

·         Ultra Low-Power Precision Analog Peripherals are present in EM3 Stop mode.

·         Dc-dc buck regulator helps in power consumption and can be operated in strict battery conditions but if the input voltage is too low then it switches to bypass mode.

·         Software flexibility for managing the power consumption adds as a key thing to strict battery operation.

·         The PRS allows peripheral to act autonomously without waking the MCU core, saving power. So,this helps to attain power consumption and keeps a track to run under strict battery conditions.

·        Low energy UART communication is possible in EM2 deep sleep mode.

·        Watch dog timers generates interrupts to wake up the core from sleep mode to provide the service and it can also monitor the autonomous systems driven by PRS.

·        Low frequency RC and low frequency crystal oscillator and ultra low frequency RC oscillator and wake pin and GPIO pins, brown out and power on reset are present in EM4- shut off mode and only these are used in strict battery conditions.

·        I2c communication is also possible in low energy modes.

STM8L Controller:

·         Low power modes helps in operating under strict battery conditions whichs consumes ultra low power.

·         Under the halt mode, cpu and peripheral clocks are stopped and device remains powered on. The wakeup is triggered by  external interrupts or reset. Switching off the internal reference voltage reduces the power consumption here.

·         When entering Halt or Active-halt modes, the system automatically switches from the MVR(main voltage regulator) to the LPVR(low power voltage regulator) in order to reduce current consumption.

·         Clock management reduces the power consumption by stopping the clock to the core and peripherals.

·         In the wait mode, the CPU clock is stopped, but selected peripherals keep running. An internal or external interrupt, event or a Reset can be used to exit the microcontroller from Wait mode (WFE or WFI mode).

·         In the low power run mode, the CPU and the selected peripherals are running. Execution is done from RAM with a low speed oscillator (LSI or LSE). Flash memory and data EEPROM are stopped and the voltage regulator is configured in ultra-low-power mode. The microcontroller enters Low power run mode by software and can exit from this mode by software or by a reset.

·         Timers and USART, SPI,I2C communication is not possible the low power modes.

·         It has the capability to execute from the ram under low power run mode and low power wait  mode.

·         Analog peripherals can’t be used in low power modes. brown-Out Detector which helps in short dip for the power supply.

Advantages and drawbacks on comaparision:

Advantages:

EFM32JG Controller:

·         ARM Cortex-M3 CPU platform

·         High Performance 32-bit processor @ up to 40 MHz

·         Wake-up Interrupt Controller is present which is readily used in low energy modes.

·         Flexible energy management (EMU) manages the energy modes like EM0,EM1,EM2,EM3,EM4 which are the source to low power consumption.

·         Up to 256 kB flash program memory

·          32 kB RAM data memory

·         Up to 32 General Purpose I/O Pins

·         1× 32-bit Real Time Counter and Calendar

·         1× 32-bit Ultra Low Energy CRYOTIMER for periodic wakeup from any Energy Mode

·         16-bit Low Energy Timer for waveform generation

·         Advantage of dc-dc regulator stands for power consumption and short circuit pretection.

·         By pass mode of dc-dc regulater, helps in current limiting.

·         Dc-dc regulator attains 90% efficiency in energy modes cover s load currents and voltages.

·         SPI  communication is possible by overriding the GPIO pins.

·         Low energy UART communication possible within strict power budget.

·         Low energy timer used fortming and output generation under low power.

·         PRS is helpful in saving the power.

·         Watch dog timer keeps monitoring the prs.

·         Flexibility in assigning the pins for the controller is vast.

·         12 bit resolution adc is configurable.

·         2* usart communication channels are present.

·         Digital peripherals are also supported with much compatability.

·         8 channel DMA controller are present.

·         32 analog channels are present.

DRAWBACKS:

·         At the time of external clock failures, internal clocks are not present to overcome the failures.

·         Adc supporting buses are more but adc supporting are less.

·         SPI communication has  no  separate pin declaration instead it is possible with GPIO pins.

·         Lcd driving digital pins are not present.

·         Shared buses are present for analog peripherals instead of separate pins.

·         Timers and PRS channels are much more

·         Current consumption is more in energy modes compared with stm controller.

STM8L Controller:

Advantages:

·         Advanced stm 8 bit controller

·         32k bytes of flash memory

·         2k bytes of ram

·         256 bytes of eeprom

·         Usage of current is less in low power modes is less than efm controller

·         Clock security system is present for safe switching of clock between cpu and peripherals.

·         41 GPIO pins are present which all are mappable interrupt vectors.

·         Only one SPI,I2C,USART communication channels are present.

·         Lcd driving are present.

·         Analog supporting pins are more and 25 channels are present.

·         At the time of external clock failure, internal clock can be used.

·         Infrared interface is present.

·         Execution of ram can be done in low power mode.

·         To get the best compromise between speed and current consumption the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.

·         Brownout detection is present.

DRAWBACKS:

·         Timers and communication interfaces can’t be used in low power modes.

·         Short prevention and current limiting can’t be done.

·         Flexibility in assigning the pins to different functions is not possible.

·         Ram is of less size.

·         It is only a8 bit controller.

·         Software reliability in power consumption is not possible.

·         Communication and timers arenot more than one channel.

·         PRS is not present to monitor core and save power.

·         Wake up pins and GPIO pins are not allocated for  wake up.

·         Only four dma controller channels are present.